Job description:
Cadence Inc. is conducting an interview for the post of Product Validation Engineer.
Job duties:
The job involves validation of Cadence vManager tool. The ideal candidate will be a Design Verification engineer in their penultimate year, or a recent graduate with good understanding of the design verification.
Job responsibilities:
- Work closely with Product Engineers and R&D on understanding feature requirements
- Develop test plans and write tests based on the feature requirements
- Perform unit, integration and solutions level validation
- Develop & maintain regression system
Qualifications and Experience required:
- Very good understanding of HDLs (Verilog, System Verilog and/ or VHDL) is MUST
- Strong analytical and problem solving skills required
- Working knowledge of PERL or Tcl scripting is required.
- Good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools.
- Good communication skills
Job/Req. ID: R29223
Company: Cadence Inc.
Location: Noida, UP
