Synopsys is conducting an interview for the post of Technical Engineering Internship.
Job duties and responsibilities:
You would be part of the team performing verification of complex IPs, developing custom verification IPs. Incumbent would be working on different phases of functional verification, including Test plan, coding, test execution, coverage etc.
The responsibilities would also include enhancement of the existing verification environment, analyzing customer’s target environment, usage, problems and help them with debugging and providing solutions.
Bachelors or Masters with specialization in VLSI/Electronics.
- Knowledge of Verilog, System Verilog
- Strong Fundamentals of Digital electronics
- C or Verilog programming
- Exposure of bus protocols either AMBA AHB & AXI / USB / PCIe etc
- Exposure to any verification methodology (VMM, OVM, UVM)
Job/Req. ID: 27642BR