ARM India is conducting an interview for the post of Graduate Engineer.
Job duties and responsibilities:
- Physical implementation of Arm’s latest CPU, GPU, NPU and Interconnect IP.
- Exposure to advanced and mainstream technology nodes(3nm/5nm/7nm/12nm/22nm) being driven by multiple foundries.
- Path-finding for Performance, Power and Area(PPA) metrics using varied recipes along with backend closure that’s representative of a tape-out.
- Implementation flow and PPA tuning across multiple vendor based EDA flows in parallel.
- Collaborating with Arm sales, marketing and end customers to refine the physical IP and implementation products.
- Contribute in brainstorming ideas, approaches and recipes on all products being designed in the team.
- Learn the intricacies of supporting products across different market segments like Client, Infrastructure,Automotive, IOT and Machine Learning.
- Celebrate with the team to rejuvenate the mind and spirit for accomplishing greater things in future.
Job duties and responsibilities:
- You will be expected to build implementations of Arm CPU/GPU class designs using Arm’s optimized physical IP.
- You will need to setup RTL, integrate memory models, create floorplans, setup synthesis / P&R flow and complete backend closure.
- The primary objective would be to optimize performance, power and area as required by the Arm IP and the associated market segment.
- In terms of backend closure, you will need to take the design through STA, EM, IR drop, signoff DRC and other types of verification steps.
- You will also need to work on lighter aspects related to DFT(scan insertion, compression and ATPG) and setup Gate-level simulations to report power.
- Your daily job will demand a lot of handshaking with physical IP teams who are responsible for “optimized” standard cell and memories.
- You will also need to work with EDA partners in an independent manner to create and deploy recipes related to EDA tools.
- You will see exposure to sales, marketing and licensing teams at Arm.This will extend to end customers also as you ramp up in the team.
Qualification & Experience required:
- BE/BTECH/MTECH with 6 months to 1 year of minimum experience in Physical Design domain.
- A star that believes in making the whole constellation brighter rather than shining all alone. We are only about “We” and not “I”.
- Values communication as a key medium to nurture learning, builds trust with others and solves complex problems with dependencies.
- Strong understanding in the RTL2GDSII flow for leading or mainstream process technologies.
- Good understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure.
- Any implementation experience on Arm CPU and GPU IP designs would be very useful.
- Expertise on optimizing for cost functions like performance, power and/or area is like gold dust.
- High-level know-how related to foundation IPs like standard cells and memories fits well with our work.
- Working experience with tools like DC/Genus, ICC2/Innovus,Primetime/Tempus etc used in the RTL2GDSII implementation.
- Good automation skills in PERL, TCL and EDA tool specific scripting can be impactful
Job/Req. ID: 19753
Location: Bangalore, KA
Job Category: Electronics or VLSI Engineering
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