DFT Engineer | T&VS Limited | Noida, UP – HWVIND28061840


Job description:

T&VS Limited is conducting an interview for the post of DFT Engineer.

Job duties and responsibilities:

  • RTL (Verilog/VHDL/SV) for ASIC – IP development or SOC integration.
    Synthesis using DC or genus
  • Verilog based Testbench and testcase developments. (ncsim or modelsim)

Qualification and Experience required:

Any candidate has 3- 6 years on ASIC domain. (NO FPGA)

Skills required:

  • Some VLSI course
  • Layout, Memory compiler design or automation
  • Knowledge in Clue logic or IP’s for Automotive.
  • STA using primetime
  • Formal Verification with spyglass or conformal


Highly competitive to match experience and capability

Job/Req. ID: HWVIND280618_40

Company: T&VS Limited

Location: Noida, UP

Job CategoryElectronics or VLSI Engineering

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