Seagate is conducting an interview for the post of Engineer I.
About our group:
The group is part of Seagate’s VLSI Organization spread globally across multiple sites. Seagate designs world class controller SoCs for their HDDs. The group in Pune participates in design and verification activities of these complex SoCs
Job duties and responsibilities:
- Work in the Seagate VLSI group on Block and SoC Design Implementation for Design-for-Test, Synthesis
- Work on DfT tasks that includes Scan, Memory BIST, Boundary Scan.
- Generate and Verify Stuck-at, IDDQ and At-speed scan patterns to meet test coverage targets.
- Work with Design and IP teams for test logic implementation at RTL and Gate level.
- Analyze scan and fault reports, Fix scan drc violations, Suggest design fix for coverage improvement
- Have basic knowledge/understanding of Timing Analysis, Physical Design, Formal Verification
- Provide support to the SoC environment in terms of overall tool debugging, script development, and revision control use
- Actively pursues opportunities for Design-for-Test on Implementation and Verification.
- Keen on learning and self-development.
- Quick learner in adapting new technologies.
- Shares knowledge with others and is keen to build expertise by working with peers and senior members of the team
- Ability and willingness to work in a multi-cultural environment and across multiple time zones.
Qualifications and Experience required:
- Basic understanding of CMOS and Power consumption
- Strong debug and analytical skills
- Perl, Tcl, Shell or other scripting languages
- Self-motivated & a strong team player
- Ability to quickly learn new tools and technologies
Job/Req. ID: 707533700