Western Digital is conducting an interview for the post of Staff Engineer.
This position involves in-depth understanding of the Memory Design and Logic Design.
Design flow from RTL to GDS2and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, clock domain crossing, and low power techniques
Job duties and responsibilities:
- Developing micro-architecture specifications.
- Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages.
- Design integration, logic synthesis, and design optimization for timing, area and power.
- Developing front-end methodologies and tool flows.
- Participating in chip bring-up and testing
- Strong Digital Electronics Fundamentals
- In Depth RTL Coding experience
- Good understanding of logic design and VLSI design.
- Exposure with Cadence NCSIM, Verdi
- Optional knowledge of System Verilog and C.
- Knowledge of design verification, and functional coverage.
- Ability to program using scripting languages.
- Effective communication skills and a good team player
- Knowledge in logic synthesis and timing closer are must, and some experience is a plus
- Strong Problem Solving & Communication skill is a must
About Western Digital:
Western Digital Corporation is the world’s largest data storage company with a leading portfolio of HGST, SanDisk, G-Technology and WD brands covering flash and disk-based solutions. Deployed by the largest and most.
Job/Req. ID: JR-0000062258
Company: Western Digital
Location: Bangalore, KA
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