Physical Design Engineer – 210000MW | Texas Instruments | Bangalore, KA

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Job description:

Texas Instruments is conducting an interview for the post of Physical Design Engineer.

Job duties and responsibilities:

As a Physical designer in the team, you will be working independently on complete RTL to GDS flow including Constraints development for all design modes, Timing Analysis/closure for the high speed digital designs, reliability & physical verification closure. You will also be working closely with Architecture, RTL, DFT, DV, Packaging & Analog teams and own SoC/IP level handoff for tape-out.

Qualifications and Experience required:

  • Bachelor or Master’s degree in engineering.
  • 3+ years design experience
  • Expert in physical implementation of high speed block closure
  • Good understanding of SoC level integration and timing closure
  • Experience in contemporary physical design flows using Cadence tools
  • Experience in Reliability & physical verification closure
  • Good understanding of constraints development for both functional & test modes
  • Understanding of DFT architecture, scan insertion/tracing

Preferred Skills/ Experience:

  • Expert in Physical implementation & signoff using EDA tools with contemporary flows. Cadence tool experience is preferred.
  • Experience in tape-out of atleast 2 chips & understanding of requirements for releasing for manufacturing
  • Understanding of IC design with Analog circuits and it’s design cycles is an added advantage.
  • Understanding of standard interfaces at chip level & integration aspects
  • Experience with TCL is must & requires good understanding in PEARL scripting
  • Experience in team work & effective communication skills to interact with all stakeholders like design, systems, analog, test & package teams
  • Must be highly focused and remain committed to obtaining closure on project goals
  • Bachelor or Master’s degree in Electrical engineering.
  • Bachelor or Master’s degree in engineering.
  • 3+ years design experience
  • Expert in physical implementation of high speed block closure
  • Good understanding of SoC level integration and timing closure
  • Experience in contemporary physical design flows using Cadence tools
  • Experience in Reliability & physical verification closure

Job/Req. ID: 210000MW

Company: Texas Instruments

LocationBangalore, KA

Job CategoryElectrical or Electronics or VLSI Engineering

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