GLOBALFOUNDRIES is conducting an internship for Engineers.
Job duties and responsibilities:
- Test chip circuit design, Simulation/Layout/Verification
- Develop robust flow and methodology for various Test chip architectures
- Good understanding on the Chip level Design aspects and signoff requirements.
- Having bond knowledge of package, bond diagram is added advantage.
Required Qualifications and Experience:
- Requires a ME/MS/MTECH in VLSI, Microelectronics from an accredited university.
- Should be fluent with Cadence EDA tools for schematic and physical layout, design rule checking (DRC), layout versus schematic checking (LVS, schematic and layout extraction, methodology checking)
- Should be fluent with schematic design/ simulations/verifications
- Language Fluency – Fluent in English Language – written & verbal.
- Must have proficient knowledge of and experience with UNIX environment
- Must have hands-on experience with TCL or any other programming language
- Should have excellent problem solving skills, written & oral communication, teaming & interpersonal skills
- Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs
- Knowledge of scripting languages like Python/Perl preferred
- Having knowledge on CAD setup and resolution of minor CAD issues
Job/Req. ID: 21003439