Job description:
Semichip Technolabs is conducting an interview for the post of VLSI Design Engineer.
Job duties and responsibilities:
Semichip requires skilled digital design engineer who is confident, self-motivated and has strong fundamentals. The successful candidate will be responsible for architecture, implementation level documentation, RTL coding, Lint and CDC check, block-level verification, test-plan development, assertion and functional coverage coding, simulations and related activities.
The role will be part of the VLSI IP group function in which there is a very strong culture of teamwork, cooperation and collaboration for common goal of producing quality IP.
Essential responsibilities:
Architecture development and documenting implementation level details
- Verilog and Systemverilog based coding, Lint and CDC check, and block-level synthesis and simulation
- Contribute in test-plan development and reviews
- Block-level verification, and coding for assertions and coverage
- Contribute and support the team for various tasks related to IP development
Qualifications and Experience required:
- Strong digital design fundamentals and verification concepts
- Extensive experience in Logic design and verification with Verilog, SV
- Experience in Lint, CDC, FPGA/ASIC Synthesis, STA and timing closer
- Experience in any Processor based system, SoC, AMBA System bus and DMA concepts
- Hands on work experience on any of DDR/PCIe/Eth/USB/SATA/DP/HDMI/MIPI etc.
- Scripting for automation, release process, simulations, regressions
- Good command over written and oral communication
Experience required: Minimum 1 year
Job/Req. ID: N/A
Company: Semichip Technolabs
Location: Hyderabad, Telangana
Job Category: VLSI Engineering
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