Technical Engineering Internship (31646BR) | Synopsys | Delhi, India


Job Description:

Synopsys is conducting an internship for Engineers.

Job requirements:

  • The candidate would be part of the VIP group responsible for development of Verification IPs.
  • Core responsibilities would include Designing and developing the VIP, Creating
  • Verification/Coverage plans, Creating Functional specifications, Coding sequences & test scenarios, Coverage driven verification.
  • The candidate is also expected to interface with customers during VIP deployment to help with integration and usage related aspects.

Qualifications and Experience requirements:

  • B.Tech/M.Tech with 0-2 years of relevant industry experience.
  • Hands-on experience in developing HVL based verification environments, preferably using System Verilog.
  • Experience in verification methodologies like UVM/OVM/VMM.
  • Exposure to coverage driven verification.
  • Exposure to complex SoC and IP level verification environments.
  • Experience in VIP development is highly desirable.
  • Experience with any one of the standard simulators like VCS/IUS/MTI.
  • Exposure to DRAM standards like DDR/LPDDR/GDDR/HBM is highly desirable.

Job/Req. ID: 31646BR


Location: Delhi, India

Job Category: VLSI Engineering

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