Job description:
Microchip Technology is conducting an interview for the post of Verification Engineer.
Job duties and responsibilities:
- Collaborate with Architect, Design, Applications and Software teams to develop comprehensive verification plan.
- Develop directed and constrained random tests using a mix of System Verilog and C.
- Implement functional coverage model and enhance the testbench to ensure coverage closure at system-level environment.
- Develop System Verilog/UVM testbench environment for block-level functional verification.
- Develop scripts to support automation of verification process.
- Constantly adapting to and evaluating leading edge technologies.
- Support post-silicon validation activities.
Qualifications and other requirements:
- MS or BS in Electrical Engineering or Computer Engineering (or equivalent)
- Good understanding of Digital Design Fundamentals.
- Proficient in Verilog, System Verilog, C/C++, PERL, Python.
- Knowledge of C/C++, scripting programming languages such as Perl, Python.
- Ability to work in a Linux shell environment is required and Linux scripting is a plus.
- Experience using EDA tools such as Questa, VCS, NCSim is a plus.
- Good understanding of Object-Oriented Programming is a plus.
- Working/Internship experience in one of the verification methodologies (UVM) is a plus
- Strong written and verbal communications skills
- Self-motivated, able to work independently or part of a team.
Job/Req. ID: I1432-21
Company: Microchip Technology
Location: Chennai, TN
Job Category: Electrical or VLSI Engineering
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