Synopsys is conducting an interview for the post of R&D Engineer, I.
B.E / M.E. in Electronic & Communication / Computer Science Engineering
- Programming concepts in C/C++, OOPS
- Should have good knowledge of digital design concepts.
- Knowledge of HDL language System Verilog, Verilog required.
- Experience with Perl / TCL / some scripting language is a plus.
- Protocol knowledge of protocols like ENET, HDMI. MIPI, AMBA, UART is added advantage.
- Knowledge of UVM and Functional verification is added advantage
- Good communication skills and team player.
- Must be resourceful to complete assigned tasks within limited resources.
Job/Req. ID: 41014BR
Location: Noida, UP
Job Category: VLSI Engineering