Job description:
Intel is conducting an interview for the post of PDK Circuit QA Engineer.
Job duties and responsibilities:
This role is in the PDK validation team. Primary job is the validation of the design and process technology collaterals in the PDK for several different process nodes. In this role, candidate will need to develop test circuit designs, setup simulation test benches and be able to run pre-layout and post-layout simulations using multiple simulator tools from different EDA vendors. Debugging and fixing the errors reported in Simulation flows/results will be required. PDK collateral Issues have to be filed in a defect tracking database and followed-up on until closure.
Qualifications required:
- Candidate should have good knowledge about PDK, Pcells/Pycells, Front End and Back End custom.
- Candidate should have an M Tech in VLSI domain.
- Candidate should have strong analog design and circuit fundamentals and knowledge of spice.
- Basic experience with Schematic capture in Virtuoso and setting up simulation test-benches, is desired.
- Candidate should be have automation skills – Skill, TCL and/or Python.
- Good written and verbal communication skills are a must.
Inside this business group:
As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art — from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.
Job/Req. ID: JR0238712
Company: Intel
Location: Bangalore, KA
Job Category: VLSI Engineer
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