Job description:
Synopsys is looking for Intern for DFT to join the team.
Job duties and responsibilities:
- The Design-For-Test Intern works in a project-oriented environment to deliver DFT Solution ranging from Integration to Silicon Bring-up to customers designing digital ICs of varying complexity. The DFT Intern engineer interacts with the customers to assess their methodologies and flows, gather requirements and propose solutions. Responsibilities include but not limited to the following:
- Participate in Test methodology towards development of Synopsys Test Solution for example 1687, 3DIC, Access, ATPG, etc.
- Participate in Flow Automation to enable seem-less integration of newer technologies into Synopsys Test tools & Platforms.
- Participate in Development of Reference Flows for our renowned test solutions.
- Implementation of design for test (DFT) compression, validation, automatic test generation for single stuck at (SSAF), Transition Delay Fault, Cell-aware faults, and other advanced fault models
- Participation in customer’s design and flow reviews;
- Diagnostics analysis and debug
- Excellent communication and presentations skills are mandatory. Listening, understanding, and interpreting the customer requirements are a key part of the communications skill set. Good technical problem-solving skills are a must.
Qualifications required:
BE / MTech of relevant experience in Electrical Engineering or Computer Engineering or other relevant field of study.
Job/Req. ID: 42437BR
Company: Synopsys
Location: Hyderabad, Telangana
Job Category: Electrical or Computer Science or VLSI Engineering
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