Intern (Technical-Engineering) – 43099BR | Synopsys | Hyderabad, Telangana


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Job description:

Synopsys is conducting an internship for Engineers.

Job duties and responsibilities:

  • The candidate will be a key member of the Synopsys Design Ware ARC Processor hardware team.
  • Responsibility includes development of Verification Test benches and automation, creation of tests – both directed and random, functional coverage model creation and report review, code coverage review, development of C-models, resolving mismatches between design and C-model, integration of third party and internal verification IP, regression management, review and improvement of verification test suites.

Qualifications and experience required:

  • Bachelor’s or Master’s degree in engineering is required as a minimum.
  • Requires a 0+ years of related experience.
  • Experience on System Verilog, UVM is must Good Digital Design concepts will be big plus.
  • Good written, verbal skills desired.
  • Experience in CPU architecture is a big plus.

Experience in following areas is preferred:

  • HDL and Verification languages: Verilog, System Verilog, UVM, OVM
  • Programming skills: C++, assembly, Python, tcl.
  • Tools: RTL Simulators, e.g. VCS

Job/Req. ID: 43099BR



Job CategoryVLSI Engineering

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