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Job description:
Steradian Semiconductors is hiring Interns for 6 Months duration, Interested Students can apply for the below mentioned profiles. can send resume to [email protected]. While sharing the resume, it is important to write subject clearly with your area of interest.
E.g.: Internship Application for Analog domain.
Steradian Semiconductors is looking for 6 Months internship, June to Dec Batch for all the divisions.
Requirement for Hardware, Systems and Analog, and can join immediately.
2023 pass out students also can apply as Consultants.
Analog:
Essential Functions:
- Transistor Level design of a variety of Analog/Mixed-Signal blocks such as high-speed ADCs and DACs, Phase-Locked-Loops, signal conditioning blocks like buffers, filters, variable- gain amplifiers, as well as LDO regulators, charge-pumps, bandgap and current references etc.
- Discuss block and system performance with System Engineers and develop adequate circuit topologies and architectures to fulfill the system requirements.
- Perform/supervise the chip floor-planning and layout, post-layout extractions and verifications.
- Perform/supervise silicon characterization, reliability evaluation and the development of APIs for measurements.
- Prepare and maintain project documentation including general specification, circuit description, and measurement reports.
Required education and experience:
- BTech/MTech/MS/PhD.
- Proven track record of Analog/Mixed-Signal blocks integrated circuit design in CMOS technologies with completed projects from architecture to tape-out and silicon characterization.
- Experience with Cadence Virtuoso and Spectre-RF is a must.
- Experience with standard CMOS RF models and/or SOI/BiCMOS technologies. Deep understanding of device modeling; supply isolations and circuit layout for optimum performance.
- Good understanding of system specifications and the ability to work with system architects to translate system requirements into circuit requirements at the IC level.
- Familiarity with system and behavioral modeling using Matlab/Python, System Verilog, Verilog-A/AMS, is a plus.
- Hands-on experience in mm-wave silicon characterization and debug. Knowledge of Python or C (for test and analysis scripting). Knowledge of test parameters and test equipment; oscilloscope, VNA, spectrum/signal analyzers, hands-on experience in analog/Mixed-Signal testing.
- Must possess good communication and presentation skills and the desire to be part of a dynamic team.
Digital or RTL design:
Essential Functions:
- Design and implementation of SoC, Interface (eg MIPI), Signal conditioning blocks, memory etc.
- The candidate will understand and work on all aspects of the VLSI development cycle such as architecture, micro architecture, Synthesis / PD interaction and design convergence and actively work with various core, verification and physical design teams.
- They will perform system architecture, micro-architecture selection, RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check and formal verification in Cadence flow.
- Responsible for IP / sub-system level micro-architecture development and RTL coding.
- Prepare block/sub-system level timing constraints
- Integrate IP/sub-system. Perform basic verification either in IP Verification environment or FPGA.
- Keep track of coverage metrics and bugs encountered and fixed. Implement self-testing directed and random tests.
- Support post silicon bring up and debug activities.
- Discuss block and system performance with System Engineers and develop adequate circuit topologies and architectures to fulfil the system requirements.
- Supervise the chip floor-planning and layout, synthesis/clock-tree extractions and verifications.
- Perform/supervise silicon characterization, reliability evaluation and the development of APIs for measurements.
- Prepare and maintain project documentation including general specification, micro-architecture, circuit description, and measurement reports.
Required Education and Experience:
- BE/MTech/MS/PhD
- Understanding of micro-architecture to GDS flow.
- Proven track record of Digital ASIC circuit design in CMOS technologies with completed projects from architecture to tape-out and silicon characterization.
- Experience with Cadence tools is a must.
- Experience with 28nm CMOS technologies.
- Good understanding of system specifications and the ability to work with system architects to translate system requirements into circuit requirements at the IC level.
- Familiarity with system and behavioural modelling using MATLAB/Python, System Verilog.
- Hands-on experience in silicon characterization and debug. Knowledge of Python or C (for test and analysis scripting). Knowledge of basic test equipment’s (Oscilloscope, logic analysers etc)
- Must possess good communication and presentation skills and the desire to be part of a dynamic team.
Software:
Essential Functions:
- Design and develop a software processing chain of raw ADC data and generate high resolution radar images.
- Develop fast kernels on GPU.
- Develop drivers to interact with different peripherals on board.
- Write tests for existing and created code to ensure compatibility and stability.
- Work alongside other engineers on the team to elevate technology and consistently apply best practices.
Required Education and Experience:
- Bachelor’s and/or master’s degree in Electrical Engineering or related technical discipline
- Proficiency in C/C++, and Python
- Knowledge of algorithms and data structures
- Knowledge of communication protocols like SPI, I2C, socket communication.
- Knowledge of version control systems (git) and build systems like Makefile and CMake
- Experience of developing software on Nvidia GPU
- Strong analytical and reasoning skills
- Strong mathematical background, Excellent verbal and written communication skills and ability to work collaboratively
Systems:
Essential Functions (At least 1 out of the first 2):
- Develop and code digital signal processing modules for improved detection/estimation capabilities of radar (preferably in Python) – including range, Doppler, Angle of arrival estimation.
- Enhance radar perception algorithms using the latest from the world of clustering, vehicle tracking, object classification, pose estimation, etc.
- Integrate, maintain and test radar signal processing stack Develop and maintain automation framework for verification of the processing stack
Required Education and Experience:
- BTech/MTech/MS/PhD.
- Good knowledge of signal processing concepts and estimation-detection theory.
- Good understanding of system specifications and the ability to work the signal processing chain from the RF to analog and to the digital baseband domain.
- Experience with development in Python, C, C++.
- Hands-on experience in conducting lab experiments. Knowledge of test parameters and test equipment; oscilloscope, VNA, spectrum/signal analyzers.
- Must possess good communication and presentation skills and the desire to be part of a dynamic team.
- Follow rigorous work flow practices including design review & documentation of the work.
Nice to haves:
- Exposure to MIMO radar signal processing – spectral estimation, compressive sensing, sparse signal processing.
- Exposure to building perception software for LiDAR/Radar – including but not limited to spatial clustering and object tracking
- Experience in parallelizing algorithms over GPU architectures
Hardware:
1. Role
- PCB schematic creation & PCB layout
- Create PCB schematic.
- Verify components number & specification.
- Verify foot print & pinout.
- Work with PCB design engineer.
- Interface with PCB manufacturer & Assembly house.
- Work with manufacturer for stackup, design rule, schedule, quotation etc.
- iWork with Assembly house for assembly instruction, BOM, stencil files, schedule, quotation etc.
- Component/Board inventory management:
- Work with lab assistant to manage/order components inventory.
- Manage board inventory, assign serial number etc.
- Board bring-up:
- Board debug/bring up.
- Powerup (dc voltage & clk check etc).
- Functional test (data capture, stability etc).
- Test/measurement:
- Work with design team / test team members & test RFIC part as per the datasheet.
- Gain, Noise figure, TX output power, phase noise etc.
- Write automated script for above.
- 2 test engineers are available on site to help with above.
2. Skill:
- Allegro Schematic capture
- Allegro PCB review & minor edit.
- Working knowledge with test equipment: Spectrum Analyzer, CRO, Signal source analyser, Network analyser etc.
- Any one Scripting language (for example python, lua, etc).
Job/Req. ID: N/A
Company: Steradian Semiconductors
Location: Bangalore, KA
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