Job description:
Analog Devices is conducting an interview for the post of AES Engineer.
Job duties and responsibilities:
- Collaborate closely with existing digital and analog design engineers during mixed signal system definition to contribute to a robust and efficient Digital Architecture. Decompose system level requirements to a set of requirements and specifications at the digital hardware block level.
- Contribute to the project implementation of digital design activities:
- Full chip/block level RTL design and implementation.
- Design-for-Test implementation.
- Collaborate with analog design engineers to define mixed-signal control loops, interfaces, and calibration schemes.
- Liaise with DMS and AMS verification teams on verification plans, test cases, and analysing test results.
- Modelling/simulating/debugging digital circuits.
- Liaising with the physical design team in their implementation of the digital cores (i.e. synthesis, P&R, timing closure etc.).
- Collaborate with internal and contractor project resources to achieve project milestones.
- Work within the wider ADI digital design community to proliferate & share best practice methodologies and technologies.
Qualifications, experience and other requirements:
- Minimum BTech/BE degree in Electrical/Electronics/Computer science with 2+ years of digital logic design experience or MTech/ME degree in Electrical/Electronics/Computer science
- Knowledge in Processor/SoC architecture.
- Good verbal and written communication skills to logically drive the discussions effectively with teams spread geographically
- Knowledge of DSP fundamentals will be an added advantage.
Minimum qualifications:
BE/ME degree in Electronics Engineering with 2+ years relevant digital ASIC design experience
Required skills/experience:
- Good experience working with all aspects of the digital design flow. Knowledge of verification and physical design as it applies to digital design is an advantage:
- Good knowledge of RTL coding techniques and good design practices.
- Understanding of constrained-random DV techniques using SV UVM-based testbenches.
- Understanding of digital physical implementation challenges (synthesis, place-and-route, DFT, STA, etc.).
- Experience in the use of FPGAs an advantage.
- Good problem-solving skills with an ability to understand and clearly articulate technical issues.
- Good supplementary skills in scripting languages (such as TCL, Perl, Python, or similar) an advantage.
Job/Req. ID: R232608
Company: Analog Devices
Location: Bangalore, KA
Job Category: Electronics or VLSI Engineering
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