Verification IP Engineer – R&D Engineer, I (44699BR) | Synopsys | Noida, UP

Job description:

Synopsys is conducting an interview for the post of Verification IP Engineer.

Job duties and responsibilities:

  • The candidate would be part of the VIP group responsible for development of Verification IPs.
  • Core responsibilities would include Designing and developing the VIP/Test-bench, Creating Verification plans, Coding sequences/Test-scenarios, Coverage driven verification.
  • The responsibility would also include enhancement of the existing Verification IP products and interface with customers during VIP deployment.

Requirements:

  • Bachelors/Masters with good academic record.
  • Hands-on experience in developing HVL based verification environments, preferably using System Verilog.
  • Exposure to coverage driven verification.
  • Demonstrates good analysis and problem-solving skills.
  • Have a strong passion for work and driving things to closure.

Job/Req. ID: 44699BR

Company: Synopsys

Location: Noida, UP

Job CategoryVLSI Engineering

Join all India VLSI Jobs Telegram Group

Sorry, the job you’re looking for is not available. There are other latest opportunities you might be interested in. Check them out on the homepage.