Job description:
Qualcomm is conducting an interview for the post of DFT CAD Engineers.
Job duties and responsibilities:
- Work with multiple SOC Design teams to rollout robust DFTCAD flows for DFT logic insertion and DFT logic signoff.
- Provide implementation flows support and issue debugging services
to SOC design teams across various site - Develop and maintain 3rd party tool integration and product
enhancement routines - Should lead implementation flow development effort independently by working closely with design team and EDA vendors
- Should drive new tool evaluation, methodology refinement for PPA optimization
Skill set required:
- Proficiency in Python/Tcl
- Familiar with tools Tessent, TestMax, DC_NXT, FC , LEC, CLP signoff tools
- Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking
- Familiarity with standard software engineering practices like Version
Control, Configuration Management, Regression is a plus - Should be sincere, dedicated and willing to take up new challenges
Minimum qualifications:
Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
Master’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
Experience required:
3 to 6 years of experience in RTL/Netlist DFT insertion, Physical aware Synthesis for cutting edge technology nodes, logic equivalence checking, Scripting and Netlist Signoff
Job/Req. ID: 3054392
Company: Qualcomm
Location: Bangalore, KA
Job Category: VLSI Engineering
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