Engineer- DEG Layout | Micron Technology Job | Hyderabad (ID: JR53498)

Job description:

Micron Technology is conducting an interview for the post of DEG Layout Engineer.

Job duties and responsibilities:

  • Responsible for Design and development of Layout for critical Custom/Memory/Analog or STDCELL circuit.
  • Perform layout verification like LVS/DRC/quality check and documentation.
  • Responsible for on-time delivery of block-level layouts with acceptable quality.
  • Contribute to effective project-management.
  • Effectively communicating with global and local engineering to assure the success of the layout project.

Qualification/Requirements:

  • Completed Certificate/Diploma course in Analog/Custom Layout design from reputed institute.
  • Understanding of Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
  • Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices etc.)
  • Understanding Layout effects on the circuit performance such as speed, capacitance, power and area etc.,
  • Ability to understand design constraints and implement high-quality layouts.
  • Good understanding and problem-solving skills in physical verification of custom layout.
  • Excellent verbal and written communication skills.

Job/Req. ID: JR53498

Company: Micron Technology

Location: Hyderabad, Telangana

Job Category: VLSI Engineering

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