Job description:
Google is conducting an interview for the post of CAD Methodology Engineer.
Job duties and responsibilities:
As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
As a CAD Methodology Engineer, you will plan and execute work in an innovative and fast-paced environment, with a focus on providing cutting edge flow and methodology solutions for high performance IP development. You will work with architects, logic designers, and verification engineers to develop flows to build and verify complex IPs and subsystems.
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer science, or equivalent practical experience
- 3 years of experience with development projects in VLSI
- Experience in RTL design, verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation
Preferred qualifications:
- Master’s degree in Computer or Electrical Engineering
- Experience in designing or verifying digital logic using SystemVerilog for FPGAs, ASICs, and/or SoCs
- Experience in design verification technologies like UVM, simulation, coverage collection, test planning, debug, integration flows, build/release flows
- Experience in programming languages such as C++ and scripting languages such as Python/Perl/TCL
- Experience in interacting with Electronic Design Automation (EDA) vendors and understanding of some of the EDA design tools like VCS, Xcelium, Verdi, Spyglass, Coretools, Defacto/Magillem
- Excellent scripting skills in Python, Perl, and TCL
Job/Req. ID: N/A
Company: Google
Location: Bangalore, KA
Job Category: VLSI or Computer or Electrical Engineering
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