Job description:
Join Micron Technology’s DEG Team as a Layout Design Engineer
Micron Technology’s DEG Team in Hyderabad, India, is looking for a Layout Design Engineer to work on intensive applications such as artificial intelligence, high-performance computing solutions, and high-bandwidth memory. In this role, you will collaborate with peer teams across Micron’s global footprint in a project-based environment.
Job duties and responsibilities:
- Layout Design: Responsible for the layout design of leaf cell/Stdcell or sub-blocks.
- Fundamentals: Possess a solid understanding of MOS basics, fabrication fundamentals, and analog layout basics.
- Motivation and Precision: Highly motivated, detail-oriented, and systematic in IC layout design.
- Commitment: Demonstrate a strong commitment to assignments and proactively ensure timely completion.
- Verification: Capable of interpreting DRC/LVS and other physical verification checks.
- Communication: Effectively communicate with internal teams to ensure the success of layout projects.
Qualifications/Requirements:
- Experience: New college graduates to 2 years of experience in analog/custom layout design in advanced CMOS processes, including various technology nodes (Planar, FinFET).
- Tool Expertise: Proficiency in Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS is essential.
- Layout Effects: Understanding of layout effects on circuit speed, capacitance, power, and area.
- Design Constraints: Ability to understand design constraints and implement high-quality layouts.
- Problem-Solving: Aptitude for problem-solving in the physical verification of custom layouts.
Education:
BE or MTech in Electronics/VLSI Engineering
Job/Req. ID: JR53874
Company: Micron Technology
Location: Hyderabad, Telangana
Job Category: VLSI or Electronics Engineering
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