Job description:
Cadence India is conducting an interview for the post of Physical Design Engineer.
Job duties and responsibilities:
- Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C)
- UVM testbench development to build a robust, scalable and efficient testbench to verify the design IPs.
- In addition to UVM functional verification, role could involve Formal verification of complex design modules.
- In addition to UVM functional verification, role could involve participating in Emulation qualification of design IPs.
Requirements:
- Position is based in Bangalore/Noida, part of Cadence IP Group.
- Understand design and produce detailed verification strategy and test plan.
- Self-starter and learner with passion for getting the job done on time with great quality.
- Strong problem solving, analytical and debug skills
- Excellent verbal and written communications skills
- Clearly communicate project status, issues etc.
Benefits:
- The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
- Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
- The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
- Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
- You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
- Design Verification role for IP development team.
Job/Req. ID: R46830
Company: Cadence
Job Category: Electronics or VLSI Engineering
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