Job description:
Intel is conducting an interview for the post of IP Design Verification Engineer.
Job duties and responsibilities:
- Execute IP verification plan as per release milestone and schedule
- Functional Logic verification based on MAS and Protocol requirements
- Simulate, Debug, Report issues and resolve working with design team (RTL and BMOD teams)
- Plan and implement functional cover groups
- Write assertions and checkers. Regression run and failure analysis; coverage analysis and improvement planning (including custom logic HIPs)
- Protocol Knowledge: DDR domain. GDDR6/7. HBM2/3 and Other Protocols like APB, JTAG , IOSF
Qualifications required:
- Primary Skills Required:
- System Verilog and UVM
- Test case and Sequence Development
- Assertion property check development
- Preferred additional skills:
- Knowledge of Gate level simulation with SDF, Knowledge of AMS Logic Spice simulation flow, Power aware simulation UPF, Firmware verification
- Qualification should be M Tech or ME Electronics/Electrical/VLSi
Job/Req. ID: JR0264212
Company: Intel
Location: Bangalore, KA
Job Category: VLSI Engineering
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