Job description:
Cadence is hiring for the post of Design Engineer in Bangalore.
Requirements:
- 1 + years of experience in analog/mixed-signal layout design of deep sub-micron CMOS circuits.
- High level of proficiency in custom and standard cell based floor-planning and hierarchical layout assembly.
- Experience implementing analog layouts to achieve tight matching, low noise, and low power consumption. Layouts may include analog blocks, resistors, capacitors, pad IOs, ESD structures, etc
- Must understand techniques for managing IR drop, RC delay, electromigration, self-heating and coupling capacitance.
- Designing complex layout for mixed signal, and analog circuits in deep sub-micron CMOS technologies.
- Must recognize failure prone circuit and layout structures, have experience with analog and DFM best practices, and proactively work with circuit designer to identify the best approach to solving problems.
- High level proficiency in interpretation of CALIBRE/PEGASUS/ DRC, ERC, LVS, etc. reports.
- Knowledge of CADENCE layout tools.
- Scripting skills in PERL or SKILL are considered a plus, but not required.
- Work closely and cross-functional across different groups to support a successful and on-time completion of tasks.
Job/Req. ID: R46627
Company: Cadence
Location: Bangalore, KA
Job Category: Electronics or VLSI Engineering
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