FPGA RTL Design Engineer Job Opportunity In Bangalore (2 Positions)

August 3, 2024

Job description:

Intel is conducting an interview for the post of FPGA RTL Design Engineer.

In Q4 2023, Intel announced Altera will be reported as a separate business unit beginning on January 1, 2024, with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.

As part of the Job profile, the candidate would be required to research, design, develop, and optimize Soft Fabric IPs using RTL design techniques that enable the use in Field Programmable Gate Arrays (FPGA).

Key responsibilities (not limited to):

Work on best-in-class FPGA tool suite to deliver soft fabric Ips
Understand and contribute to architecture and high-level design of Interconnect solution Architect, develop and test soft Fabric Ips
Develop new features for existing Ips
Collaborate with many teams worldwide involved in product development and delivery to customer

Qualifications required:

Digital logic design experience in Verilog/SystemVerilog/VHDL
Experience in developing unit level testbenches with Verilog/SystemVerilog
Experience with simulation tools like VCS and Modelsim
Knowledge of industry standard Memory Mapped and Streaming protocols including AMBA AXI protocols.
Familiarity with network-on-chip (NoC) topologies and design methodology.
Experience in FPGA design and familiarity with FPGA design tools – Intel FPGA Quartus, Xilinx Vivado, Vitis etc.
Experience in timing closure for high speed FPGA designs
Knowledge of scripting in tcl, perl or python.
Excellent communication Skills