Join now to get the best online deals every day
Job description:
Synopsys is conducting an interview for the post of Layout Design Engineer.
Job duties and responsibilities:
- High Speed DDR/HBM Layout design
- Work with DDR PHY team, package engineers and system engineers to meet design specs.
- Perform scheduling duties
- Work with local team to support critical layout and floorplanning requirements
- Coordination duties with other layout teams both in Bangalore to detail out layout activities and obtain layout deliverables.
- Strict flow adherence and policing of internal policies to secure schedules.
Skills/experience:
- Experience in Analog Mixed-signal layout and verification of high-speed digital and/or DDR/HBM IP’s
- Understanding of Deep submicron effects and mitigation, Advanced tool usage, Advanced floorplanning techniques, understand digital flow, Advanced strategies.
- Good understanding of CMOS and FinFET layouts and process technology in 28nm and smaller.
- Good understanding of basic ESD and latchup layout design considerations.
- Familiarity with ASIC physical design flow: LEF generation, Place & Route & understanding of top level verification flow, DRC/LVS, LPE.
- Good understanding of IO frame and pitch requirements, power rail routings, IO abutment rules and requirements, bondpad layout, EM and IR considerations, DFM, etc.
- Scripting skills for layout automation is a plus
- Good written and verbal communication skills in interactions with customers, and internal development teams.
Job/Req. ID: 50503BR
Company: Synopsys
Location: Bangalore, KA
Job Category: VLSI Engineering
Do you want Job alerts on your Phone? Join our WhatsApp/Telegram Group
