Job description:
L&T Technology Services is currently looking at VLSI Talents in Bangalore.
Requirements:
- Should have 3-5 years of experience in Physical design.
- Technical and highly motivated Physical Design Engineer, with technical skills in PNR flow and sign-off skills
- Tools knowledge – Synopsys, ICC2.
- Technologies – 5nm, 7nm, 10nm
- Experienced in block-level Physical Design with Static Timing Analysis using Synopsys Prime Time & ECO.
- ASIC Design flow-from specifications to GDSII. Scripts -PERL & TCL.
- Basic knowledge-Verilog code.
- Block level P&R Implementation like Floorplan, Placement, Timing Optimization, CTS, Routing Timing closure. These partitions are macros dominated, multiple experiments w.r.t Floor-planning and placement stage optimizations
- Hands on experience in Planning, Execution and Problem Solving for Block/Macro level PNR issues.
- Hands on experience in Floor-planning, Placement, Clock Tree Synthesis (CTS) and Routing.
- Hands on experience in Extraction, DRC fixing, Physical Verification and Timing Closure.
- Hands on experience in Analyzing timing reports for all timing paths and fixing timing violations.
- Hands on experience in PDK Validation – Creating test cases, 3DIC packing and backend physical verification.
Contact information: Sreenath Vijayan
Email: [email protected]
Job/Req. ID: N/A
Company: L&T Technology Services
Location: Bangalore, KA
Job Category: VLSI Engineering
Join all India VLSI Jobs Telegram Group
