Job description:
Synopsys is hiring for the post of Logic Library Silicon Test Chip Intern.
Job duties and responsibilities:
As a Logic Library Silicon Test Chip Intern, you will be part of our engineering team responsible for developing and validating logic libraries for our silicon test chips. You will gain hands-on experience in the semiconductor industry, working with experienced engineers on various design, verification, and testing aspects.
Key Responsibilities:
- Assist in designing, simulating, and validating logic libraries for silicon test chips. – Perform pre-silicon verification using industry-standard EDA tools.
- Support the preparation and execution of silicon testing, including test plan development and debugging.
- Analyze test data and provide feedback to improve design and process performance.
- Collaborate with cross-functional teams, including design, verification, and product engineers, to resolve issues and optimize performance.
- Document design methodologies, and test results, and provide recommendations for improvement.
Qualifications required:
- Currently pursuing a Bachelor’s or Master’s degree in Electronics Engineering or a related field.
- Strong understanding of digital design concepts, logic gates, and circuit design principles.
- Familiarity with VLSI design and verification tools (e.g., Cadence, Synopsys, Mentor Graphics).
- Experience with programming languages such as Verilog, & Spice simulations
- Basic knowledge of silicon manufacturing processes and testing methodologies.
- Strong analytical and problem-solving skills.
- Ability to work collaboratively in a team environment and communicate effectively.
Preferred skills:
- Knowledge of ASIC design flow, standard cells, and library characterization.
- Familiarity with scripting languages (Python, Perl, etc.) for automation tasks.
- Exposure to CMOS technology and semiconductor physics.
Job/Req. ID: 6005
Company: Synopsys
Location: Bangalore, KA
Job Category: VLSI/Semiconductor or Electronics Engineering
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