Job description:
Are you passionate about working on cutting-edge memory interface PHY IPs like DDR, HBM, and UCIe? Synopsys is seeking talented individuals to be a part of our innovative team and contribute to the future of high-speed memory solutions.
What you’ll do:
- Analog Mixed-Signal Layout & Verification for high-speed memory interfaces.
- Apply your expertise in deep submicron effects, floorplanning techniques, and advanced process technologies like CMOS, FinFET, and GAA.
- Leverage knowledge of layout matching techniques, ESD (Electrostatic Discharge), latch-up, EMIR(Electromigration & IR drop), DFM (Design for Manufacturability), and LEF (Library Exchange Format).
Preferred:
- Proven experience in analog mixed-signal layout and verification.
- Strong understanding of deep submicron effects and process technologies.
- Experience with ESD/latch-up protection and handling EMIR and DFM challenges.
- Excellent communication and interpersonal skills to collaborate within cross-functional teams.
Job/Req. ID: 6700
Company: Synopsys
Location: Bangalore, KA
Job Category: Electronics or VLSI Engineering
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