Job description:
Dielectric Laboratories is conducting an interview for the post of MEMS Layout Engineer.
Job duties and respobsibilities:
- Develop layouts of new MEMS designs and product revisions.
- Develop, test, and implement new MEMS design rules using SVRF script for Mentor Graphics Calibre.
- Conduct physical verification of MEMS layouts followed by quality checks.
- Collaborate with the foundry for all MEMS tapeout activities.
- Work independently and assist collaboratively on assignments from MEMS design engineers in the US design center.
- Provide direct oral and written communication updates regarding layout activities to the MEMS design team.
- Perform other duties as assigned.
Requirements:
- Bachelor’s or Master’s Degree in Electronics and Communication Engineering or Mechanical Engineering.
- A fresh graduate or with a minimum of 3-6 months of experience in layout design.
- Entry-level knowledge in layout CAD tools, i.e., Cadence Virtuoso, Tanner L-Edit.
- Basic knowledge in physical verification using Mentor Graphics Calibre.
- Coding experience in C or C++, Calibre rule scripting (SVRF), and knowledge in PDK development activities is an added advantage.
- Ability to document procedures and methodologies for traceability.
- Good communication and interpersonal skills required.
Preferred responsibilities:
- Develop layouts of new MEMS designs and product revisions.
- Develop, test, and implement new MEMS design rules using SVRF script for Mentor Graphics Calibre.
- Conduct physical verification of MEMS layouts followed by quality checks.
- Collaborate with the foundry for all MEMS tapeout activities.
- Work independently and assist collaboratively on assignments from MEMS design engineers in the US design center.
- Provide direct oral and written communication updates regarding layout activities to the MEMS design team.
- Perform other duties as assigned.
Skills, knowledge and expertise:
- Bachelor’s or Master’s Degree in Electronics and Communication Engineering or Mechanical Engineering.
- A fresh graduate or with a minimum of 3-6 months of experience in layout design.
- Entry-level knowledge in layout CAD tools, i.e., Cadence Virtuoso, Tanner L-Edit.
- Basic knowledge in physical verification using Mentor Graphics Calibre.
- Coding experience in C or C++, Calibre rule scripting (SVRF), and knowledge in PDK development activities is an added advantage.
- Ability to document procedures and methodologies for traceability.
- Good communication and interpersonal skills required.
Job/Req. ID: N/A
Company: Dielectric Laboratories
Location: Bangalore, KA
Job category: Electronics or Mechanical or VLSI Engineering
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