Physical Design and Timing Signoff Methodology, Silicon | Google Job In Bangalore

Job description:

Google is conducting an interview for the post of Physical Design Engineer.

About the job:

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Responsibilities:

  • Drive the physical design and sign-off timing methodologies for mobile System on a Chips (SoC) to push PPA and yield.
  • Analyze power performance area trade-offs across different methodologies and technologies.
  • Work with cross-functional architecture, IPs, design, foundry, CAD and sign-off methodology teams.

Minimum qualifications:

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 2 years of experience in timing analysis and physical design.
  • Experience in one or more scripting languages, such as Perl, Tcl, Python.

Preferred qualifications:

  • Experience in physical design tool automation: synthesis, PandR tools.
  • Experience in extraction of design parameters, QoR metrics and analyzing data trends.
  • Experience in engineering across physical design and level implementation.
  • Knowledge of timing signoff conditions and parameters.
  • Understanding of parasitic extraction tools and flow.

Job/Req. ID: N/A

Company: Google

Location: Bangalore, KA

Job CategoryVLSI or Electrical or Computer Science Engineering

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Naman Singh
Naman Singh
Naman Singh works as an Administrator for careersquare.in and commercesquare.in. He has total of 7 years of experience in the field of Recruitment and HR.