Job description:
Google is conducting an interview for the post of ASIC Design Verification Engineer.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
- Plan and execute the verification of the next generation configurable Infrastructure Internet Protocols (IPs), interconnects and memory subsystems.
- Create and enhance constrained-random verification environments using SystemVerilog.
- Develop cross language tools and scalable verification methodologies.
- Identify and write all types of coverage measures for stimulus and corner-cases.
- Debug tests with design engineers to deliver functionally correct blocks and subsystems. Close coverage measures to identify verification holes and to show progress towards tape-out.
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering or Computer Science, or equivalent practical experience.
- Experience in verifying digital reasoning at Register-Transfer Level (RTL) level using SystemVerilog or C/C++.
- Experience with verification components and environments in standard verification methodology.
- Experience in verifying digital systems using standard Internet Protocols (IP) components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
- Experience with coding languages and software development frameworks.
Preferred qualifications:
- Master’s degree in Electrical Engineering or Computer Science, or PhD in Electrical Engineering or Computer Science, or equivalent practical experience.
- Experience in architectural background with Hierarchies, Coherency, Memory Consistency Models, Peripheral Component Interconnect Express (PCIe), Packet Processors, Security or Clock and Power Controllers.
- Experience with building verification methodologies that span simulation, emulation and Field Programmable Gate Array (FPGA) prototypes.
- Experience with performance verification of System on a Chip (SOCs), pre-Silicon analysis and post-Silicon correlation.
- Experience with Interconnect Protocols.
Job/Req. ID: N/A
Company: Google
Location: Bangalore, KA
Job Category: VLSI or Electrical or Computer Science Engineering
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