Job description:
Google is conducting an interview for the post of Design Verification Engineer.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
- Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
- Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
- Identify and write all types of coverage measures for stimulus and corner-cases.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Close coverage measures to identify verification holes and to show progress towards tape-out.
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 3 years of experience with Formal Verification.
- Experience verifying digital IPs and Subsystems.
Preferred qualifications:
- Master’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- Experience with Performance Verification of ASIC Components.
- Experience with Verification Techniques.
Job/Req. ID: N/A
Company: Google
Location: Bangalore, KA
Job Category: VLSI or Electrical or Computer Science Engineering
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