Job description:
Google is conducting an interview for the post of ASIC Power Architect.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
- Drive enablement of power management architecture for an ASIC that includes functions such as image compute, CPU/Graphics Processing Unit (GPU), for maximum performance under power and thermal constraints.
- Prototype and validate for the next generation SoC power management system applicable at different design levels.
- Track and correlate across arch, design, and post-si phases, power-mode specifications, measurement, analysis and optimizations on SoC.
- Produce detailed documentation for the proposed implementation of power management scheme, produce detailed trade-off analysis for engineering reviews and product roadmap decisions.
- Collaborate with software and the power architecture team to build system level designs and methods.
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering or equivalent practical experience.
- Experience in power management or post-silicon measurements and validation.
Preferred qualifications:
- Master’s degree in Electrical Engineering or equivalent practical experience.
- Knowledge of Dynamic Voltage Frequency Scaling (DVFS), idle power management, and system mitigation.
- Knowledge of the impact of software and architectural design decisions on power and thermal behavior of the system, such as thermal mitigation and scheduling, and cross-layer policy design.
Job/Req. ID: N/A
Company: Google
Location: Bangalore, KA
Job Category: VLSI or Electrical Engineering
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