VLSI Logic Synthesis Internship | Synopsys Job In Bangalore

Description:

Synopsys is conducting an internship for Engineers in Bangalore.

Duties and responsibilities:

  • Enhancing the optimization flow for performance, power, area (PPA), or runtime in logic synthesis and optimization.
  • Identifying opportunities for improving PPA and proposing effective solutions/algorithms.
  • Implementing, thoroughly testing, and supporting optimization solutions post-deployment.
  • Collaborating with diverse teams across multiple time zones.

Eligibility:

  • Currently pursuing /graduate in bachelor’s degree in Electronic Engineering, Computer Science, or related field in the penultimate year of study.
  • Proficiency in programming in C/C++, data structures, and algorithms.
  • Strong analytical and problem-solving skills.
  • Understanding of HDLs (Verilog, VHDL); scripting languages like Perl/Tcl/Python/shell, and GDB-based debugging is beneficial.
  • Familiarity of Logic Design and Logic Synthesis is a plus.
  • Excellent written and oral communication skills and the ability to work effectively within a team.

Key Program facts:

  • Program Length: 6-12 months
  • Working Model: In-office
  • Full-Time/Part-Time: Full-time
  • Type of Internship: Industrial Placement
  • Start Date: May/June 2025

Job/Req. ID: 10227

Company: Synopsys

Location: Bangalore, KA

Job Category: VLSI or Electronics or Computer Science Engineering

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Naman Singh
Naman Singh
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