Job description:
Synopsys is looking for ASIC Digital Design Engineers.
Alternate Job titles:
- ASIC Digital Design Engineer
- Verification Engineer
- Digital Design Verification Engineer
Duties and responsibilities:
You are a detail-oriented and highly analytical ASIC Digital Design Engineer with 1-2 years of experience in the field. You possess strong technical expertise in Verilog, SystemVerilog, and UVM, and have hands-on experience with protocols like CXL, PCIe, UCIe, DDR, HBM, Ethernet, and AXI. You excel in creating and implementing verification environments and are passionate about ensuring the highest quality of digital designs. Your excellent problem-solving skills enable you to identify and resolve issues efficiently. You thrive in collaborative environments and possess strong communication skills, allowing you to work effectively with team members and stakeholders. You are proactive, eager to learn, and stay updated with the latest advancements in verification methodologies and tools. Your dedication and expertise ensure that high-quality designs are delivered to customers on time.
- Developing and implementing verification environments using Verilog, SystemVerilog, and UVM.
- Creating and executing test plans to verify the functionality and performance of UCIe controller designs.
- Collaborating with design engineers to understand design specifications and requirements.
- Identifying and debugging issues in the design verification process.
- Ensuring on-time releases of UCIe controllers with high-quality deliverables.
- Staying updated with the latest verification methodologies and tools to continuously improve verification processes.
The Impact you will have:
- Ensuring the highest quality and reliability of UCIe controller designs through rigorous verification processes.
- Contributing to the successful and timely delivery of high-performance digital designs.
- Enhancing the efficiency and effectiveness of the verification process through innovative solutions.
- Collaborating with design engineers to achieve seamless integration and functionality of digital designs.
- Providing valuable insights and feedback to improve design specifications and requirements.
- Maintaining Synopsys’ reputation as a leader in chip design and verification through your expertise and dedication.
Requirements:
- 1-2 years of experience in ASIC digital design verification.
- Strong knowledge of Verilog, SystemVerilog, and UVM.
- Experience with protocols such as CXL, PCIe, UCIe, DDR, HBM, Ethernet, and AXI.
- Proficiency in developing and implementing verification environments.
- Strong problem-solving skills and the ability to debug issues in the design verification process.
Personal characteristics:
- Detail-oriented and highly analytical.
- Passionate about ensuring the highest quality of digital designs.
- Proactive and eager to learn new verification methodologies and tools.
- Excellent communicator who can effectively articulate technical concepts and findings.
- Collaborative team player who thrives in a dynamic and challenging environment.
About the team:
You will be part of a highly skilled and dedicated verification team at Synopsys. The team is focused on ensuring the quality and reliability of UCIe controller designs through rigorous verification processes. You will work closely with design engineers and other team members to achieve common goals and contribute to the success of Synopsys. The team values collaboration, innovation, and continuous learning, providing a supportive environment for professional growth and development.
Job/Req. ID: 10702
Company: Synopsys
Location: Pune, MH
Job Category: VLSI Engineering
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