Job description:
Altera is hiring for the post of FPGA post Silicon Validation Engineer.
Duties and responsibilities:
- Develops the logic design, register transfer level (RTL) coding, and simulation for FPGAs to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.
- Participates in the definition of architecture and microarchitecture features of the block being designed.
- Creates prototypes, simulates models, and specifies systems requirements.
- Prepares and designs logic diagrams and codes for implementing system design and test specifications.
- Delivers software models for device level bring up, including user visible functionality, timing, and power.
- Applies RTL implementation techniques to qualify the design to meet required power, performance, and area goals, partnering with physical implementation team.
- Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Qualifications required:
- BS or MS in Electrical Engineering or equivalent
- Strong communication and documentation skills
- Experience with programming languages like Python, Perl, CSH, TCL, Makefiles
- Strong understanding of hardware design, logic design, Verilog, System Verilog
Job/Req. ID: R00817
Company: Altera
Location: Bangalore and Malaysia
Job Category: VLSI Engineering
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