ASIC/SoC RTL Engineer | Google | Bangalore, KA

1115

Job description:

Google is conducting an interview for the post of ASIC/SoC RTL Engineer.

About the job:

Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and aren’t daunted by the challenge of building something from scratch, then our team might be your next career step.

In this role, you will contribute in all phases of complex application-specific integrated circuit (ASIC) designs from design specification to production. You will solve technical problems with innovative micro-architecture and practical logic solutions.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Job duties and responsibilities:

  • Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
  • Perform RTL coding, function/performance simulation debug, Lint/CDC/FV/UPF checks.
    Communicate and work with multi-disciplined and multi-site teams.

Qualifications and Experience required:

  • Bachelor’s degree in Electrical Engineering or equivalent practical experience.
  • MSSE with 5 years of experience.
  • Experience in ASIC development with Verilog or VHDL.

Preferred qualifications:

  • Master’s degree in Electrical Engineering.
  • Proficient with a scripting language like Perl.
  • Domain knowledge in one of the following areas: memory compression, fabric, coherence, cache, DRAM, PHY.

Job/Req. ID: N/A

Company: Google

LocationBangalore, KA

Job category: Electrical or VLSI Engineering

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