Analog Layout Engineer | SignOff Semiconductors | Bengaluru, KA

Job description:

SignOff Semiconductors is conducting an interview for the post of Analog Layout Engineer.


  • Typically requires an Master or Bachelor in Electronics with a minimum of 3+ years of relevant experience
  • Good understanding of basic VLSI concepts: CMOS, IC Fabrication, FINFET, RC Network etc.
  • Expert in different Layout approaches associated with AMS/Digital/IO etc. starting from floorplan to closure with knowledge of basic circuits, matching constraints, design-driven constraints expected
  • Hands on experience in AMS layout (For example: PLL, RX, TX, Data converter ADC/DAC, Regulator, SERDES etc.) and in Custom Standard cells and logic design cells
  • Experience in lower nodes including FINFET is preferred
  • Familiar and hands on experience on reliability issues such as EM/IR, ESD, LUP etc.
  • Good Understanding of layout effects with related constraints in speed, parasitic, area, power and other second order effects.
  • Strong debugging and problem-solving skills in resolving layout design challenges and physical verification issues.
  • Self-motivated team player with good communication skill to adapt dynamic environment are essential
  • Experience in scripting (tcl, PERL etc.) and automation is a plus
  • Flexible to work in client location and ODC
  • Proficient in industry standard layout and verification tools in linux environment

Job/Req. ID: N/A

Company: SignOff Semiconductors

Location: Bengaluru, KA

Job Category: Electronics or VLSI Engineering

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