Formal Verification Engineer | Google | Bangalore, KA

Job description:

Google is conducting an interview for the post of Formal Verification Engineer

About the job:

Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

In this role, you will perform formal verification of design properties of complex ASIC designs. You must collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus.

You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure. This is a central role that will require you to interact with multiple design teams.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Job duties and responsibilities:

  • Plan the formal verification strategy and create the properties/constraints for complex digital design blocks.
  • Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
  • Resolve difficult to verify properties.
  • Contribute improvements to methodologies to enhance formal verification results.
  • Architect and implement reusable formal verification components.

Qualifications and Experience required:

  • Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience
  • Experience capturing design specification in a temporal assertion language (e.g., SVA or PSL)

Preferred Qualifications:

  • Master’s degree or PhD in Electrical Engineering or Computer Science.
  • Knowledge of and experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, or 360-DV
  • Experience with scripting language
  • Understanding of model checking, formal verification algorithms, and formal sign-off

Job/Req. ID: N/A

Company: Google

LocationBangalore, KA

Job CategoryVLSI Engineering

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