ASIC Digital Design Intern [36859BR] | Synopsys | Hyderabad, Telangana

Job description:

Synopsys is conducting an internship for Engineers.

Job duties and responsibilities:

The candidate will be a key member of the Synopsys DesignWare ARC Processor hardware team.

Responsibility includes development of Verification Testbenches and automation, creation of tests – both directed and random, functional coverage model creation and report analysis, code coverage analysis, development of C-models, resolving mismatches between design and C-model, integration of third party and internal verification IP, regression management, review and improvement of verification test suites.

Qualifications and Experience required:

  • Bachelor’s degree in engineering is required as a minimum
  • Requires a 0+ years of related experience
  • Good Digital Design Knowledge is must
  • Microprocessor architecture knowledge is a big plus
  • Good written, verbal and analytical skills desired
  • Experience in following areas is preferred:
  • HDL and Verification languages: SystemVerilog, Verilog
  • Programming skills : C, C++, assembly, Perl, makefile generation
  • Tools: RTL Simulators, eg VCS

Job/Req. ID: 36859BR


Location: Bangalore, KA

Job CategoryVLSI Engineering

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