Job description:
Synopsys is conducting an internship for Engineers.
Job duties and responsibilities:
The candidate will be a key member of the Synopsys Design Ware ARC Processor hardware team. Responsibility includes development of Verification Test benches and automation, creation of tests – both directed and random, functional coverage model creation and report review, code coverage review, development of C-models, resolving mismatches between design and C-model, integration of third party and internal verification IP, regression management, review and improvement of verification test suites.
Qualifications and other requirements:
- Bachelor’s or Masters degree in engineering is required as a minimum.
- Requires a 0+ years of related experience.
- Good at Digital Design is must.
- Good written, verbal skills desired.
- Experience in following areas is preferred : HDL and Verification languages: Verilog, System Verilog, UVM, OVM Programming skills : C++, assembly, Python, tcl
Job/Req. ID: 38394BR
Company: Synopsys
Location: Hyderabad, KA
Job Category: VLSI Engineering
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