Job description:
Synopsys is conducting an interview for the post of R&D Engineer, I.
Job duties and responsibilities:
- The candidate would be part of the VIP group responsible for development of Verification IPs.
- Core responsibilities would include Designing and developing the VIP/Test-bench, Creating Verification plans, Coding sequences/Test-scenarios, Coverage driven verification.
- The responsibility would also include enhancement of the existing Verification IP products and interface with customers during VIP deployment.
- This is an opportunity to work with best in class verification, debug tools, Design IP & close collaboration with best protocol experts in the industry.
- You will work with highly professional and motivated colleagues who value and support your contribution.
Requirements:
- Bachelors/Masters with good academic record (fresher/experienced).
- Exposure to coverage driven verification.
- Exposure to complex SV test benches involving multiple protocols and VIPs.
- Experience with any one of the standard simulators like VCS/IUS/MTI.
- Demonstrates good analysis and problem-solving skills.
- Have a strong passion for work and driving things to closure.
Job/Req. ID: 38288BR
Company: Synopsys
Location: Noida, UP
Job Category: VLSI Engineering
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