Job description:
Intel is conducting an interview for the post of Physical Design Engineer – ICE.
Job duties and responsibilities:
- Responsibilities may be quite diverse and are technical in nature.
- Creates bottoms-up elements of chip design including but not limited to cell, and block-level Semi-custom layouts, FUB-level floor plans, abstract view generation, RC extraction and schematic-to-layout verification, reliability verification and debug using phases of physical design development including parasitic extraction, custom polygon editing, auto-place and route algorithms, floor planning, full-chip assembly, packaging, and verification.
- Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention.
- Schedules, staffs, executes and verifies complex chips development and execution of project methodologies and/or flow developments.
- Requires expansive knowledge and practical application of methodologies and physical design.
Qualifications required:
Education:
Candidate should possess a Bachelors degree in Electronics, Electrical engineering or equivalent
Experience/Skills:Additional qualifications include:
- Basic understanding of layout design and verification
- Basic knowledge of ICC2 tool
- TCL scripting would be added advantage
Inside this Business Group:
Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC’s and critical IP’s sustain Intels Xeon and 5G networking roadmap.
Job/Req. ID: JR0224350
Company: Intel
Location: Bangalore, KA
Job Category: Electronics or VLSI or Computer Science Engineer
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