Cadence is conducting an interview for the post of Verification Engineer I.
Job duties and responsibilities:
The role is of a validation engineer in the Protium Verification team
The role involves two critical actions:
(1) Using the Cloud and compute farm to run the existing verification suite , analyze failures, benchmark performance, report bugs.
(2) Creating new tests to verify newly developed functionality for the Protium FPGA Prototyping platform. Both these actions go hand in hand as we develop a new solution.
Over a period of time , engineers can build skills in writing HDL tests, Using FPGAs for Prototyping , UNIX, Usage for farms to run compute loads.
Cadence emulation and prototyping systems provide comprehensive IP/SoC design verification, system validation, hardware and software regressions, and early software development. This role is in the Engineering Team for this solution and provides numerous opportunities to hone your skills and grow in the organization
Electronics & CS branch
Cadence® Protium™ prototyping platforms rapidly bring up an SoC or System prototype and provide a pre-silicon platform for early software development, SoC verification, system validation, and hardware regressions
Skills Needed to be successful:
- Knowledge of Verilog / System Verilog
- Knowledge of Digital Design, Computer Architecture
- Programming skills in at least one language ( C , Python, Perl , tcl )
- Analytical mindset ( determine causes of failure, triangulation )
- UNIX skills will help you get started quickly
- Clear fundamentals about Electronic Design and FPGAs
Job/Req. ID: R40791
Location: Noida, UP
Job Category: VLSI Engineering
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