Job description:
Synopsys is conducting an interview for the post of FPGA Prototyping Engineer.
Job requirements:
- Candidate will have good background in Functional validation. Candidate should have
- worked on FPGA Validation methodologies.
- Functional validation includes,
- Understanding of Verilog for RTL design, verification concepts,
FPGA tool flows, - Timing closure aspects,
- HW/SW interaction and debugging skills.
- The candidate should be able to examine the coverage metrics. And improve them with definition of more test cases.
Job responsibilities include:
- Connectivity protocols like I3C, DDR, USB, SDMMC, PCIe
- AMBA Bus protocols
- Building systems/Sub-systems involving one or more digital controller.
- Develop test cases using Verilog/System Verilog
- Validating these systems in Hardware setups
Candidate should be able to work with cross functioning teams
- Digital design/verification,
- PHY and Lab Teams,
- System Software engineers.
The candidate will work with teams spread across many sites worldwide.
Qualifications and Experience required:
- BE/BTech in Electronics with 4+ years of relevant experience
- Or MS with 3+ years of relevant experience
Required Skills:
- FPGA design methodologies
- FPGA architectural knowledge
- FPGA Placement and Timing Closure techniques
- Posses good understanding of HW and SW interaction
- Verilog/System-Verilog coding for design and verification
Desired Skills:
- UVM verification methodology
- Hands on Perforce/Git or similar version control software usage
- The candidate joins our Solutions Group – Bangalore Location
- The position offers great learning and growth opportunities
Job/Req. ID: 39251BR
Company: Synopsys
Location: Bangalore, KA
Job Category: VLSI or Electronics Engineering
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