Job description:
Synopsys is conducting an interview for the post of ASIC Digital Design Engineer.
Job duties and responsibilities:
The selected candidate will be working on top level Digital verification for high speed serdes with data range 8G->56G
Job requirements:
- Knowledge of Verilog/System Verilog or any of the VMM/UVM/OVM methodologies is a plus
- Knowledge of fundamental CMOS integrated circuit design is a plus
- Knowledge on fundamentals of circuit analysis, Mixed signal verification, EM/IR analysis and simulations. is a plus
- Understanding of semiconductor technology is plus .
- Familiar with VCS/Verdi simulation tools, Formal verification tool (vc_formal)
- Scripts skills such as Perl, Python preferred
- Domain knowledge of protocols sata/pcie/usb/ethernet/MPHY is a significant advantage
- Self-motivated, hardworking and innovative in bringing solutions to complex problems.
Job/Req. ID: 40609BR
Company: Synopsys
Location: Bangalore, KA
Job Category: VLSI Engineering
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