Top laptop recommendations for running your VHDL and Verilog Simulations
Job description:
ONSEMI is hiring ASIC Verification Engineers.
Job duties and responsibilities:
- Testbench development using System Verilog and UVM
- UVM components development.
- Create Verification plans required for the project.
- SV coverage constructs, SV Assertions
- Knowledge of C/C++ is very much added advantage
- Leveraging existing test benches, methodologies and industry best known practices
- Handle block/Module/IP level verification independently.
- Create various verification components in SystemVerilog and using related methodology guidelines
- Debug issues and present / discuss problems with designers independently
- Proactive attitude required in understanding and debugging.
- Run regression, analysis reports, achieve code coverage and functional coverage goals
- Run netlist verification without and with SDF
- Python or perl or any other scripting knowledge is advantage.
Qualifications and experience required:
- Possess BE/BTech/MS/MTech in Electronics/VLSI Engineering with Minimum 02 – 03 years’ experience in ASIC Design Verification
- Ability to understand complex micro-architectures and come up with test plan.
- Experience in IP, Chip and/or SoC level verification
- Strong Verilog, System Verilog, PLI/DPI interface, C/C++ hands on experience
- Experience with verification reuse methodologies such as UVM/OVM,VMM
- Experience in developing complex test bench in System Verilog
- Experience in writing test plans and test cases.
- Excellent hands-on debug skills
- Experience in advanced verification methodologies such as coverage driven, assertion
- Must have good communication & interpersonal skills.
- Independent, self-motivated, professional attitude and strong desire to succeed
Job/Req. ID: 2301418
Company: ONSEMI
Location: Bangalore, KA
Job Category: Electronics Engineering
Join all India Electronics Jobs or VLSI Jobs Telegram Group
