Senior ASIC Design Verification Engineer, Silicon | Google | Bangalore, KA

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Job description:

Google is conducting an interview for the post of Senior ASIC Design Verification Engineer.

About the job:

Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

Pulling on your technical and leadership expertise, you lead end-to-end research projects in multiple areas of expertise across data center facilities and manage a team of direct reports working on equipment installation, troubleshooting and debugging.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Job duties and responsibilities:

  • Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and/or UVM, or formally verify designs with SVA and industry leading formal tools.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.

Minimum qualifications:

  • Bachelor’s degree in Electrical Engineering/Computer Science or equivalent practical experience.
  • 3 years of design verification experience.
  • Experience verifying digital systems with standard IP
    components/interconnects, including microprocessor cores and hierarchical memory subsystems.

Preferred qualifications:

  • Master’s degree or PhD in Electrical Engineering or Computer Science.
  • Experience creating/using verification components and environments in methodology (VMM, OVM, UVM).
  • Experience with image processing, computer vision, or machine learning applications.
  • Experience prototyping and debugging systems on Field Programmable Gate Array (FPGA) platforms.
  • Experience with performance verification of ASIC components.

Job/Req. ID: N/A

Company: Google

LocationBangalore, KA

Job CategoryVLSI or Electrical or Computer Science Engineering

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